This invention relates to semiconductor materials. More particularly, it is concerned with methods of introducing conductivity type imparting materials into III-V compound semiconductor materials.
In the fabrication of semiconductor devices and integrated circuits techniques of ion implanting conductivity type imparting materials into wafers of semiconductor material are well known. Subsequent to ion implantation wafers of semiconductor material must be annealed by heating to an appropriate temperature for an appropriate period of time in order to activate the conductivity type imparting materials; that is, in order to permit the atoms of the conductivity type imparting materials to become properly positioned within the crystalline structure of the semiconductor material.
In order to reduce the diffusion of implanted materials during the annealing process, rapid thermal annealing techniques have been developed. Rapid annealing of III-V compound semiconductor materials must be conducted at high temperatures introducing problems because of the loss of the volatile Group V element from the wafer surface. Surface decomposition often results in poor activation of the implanted materials, low carrier mobility, or surface conversion, all of which are detrimental to the performance characteristics of the final device.
One approach to solving this problem involves depositing dielectric encapsulating material, for example silicon nitride, silicon dioxide, or aluminum nitride, on the surface of the semiconductor wafer in order to provide a coating which prevents decomposition at the surface. The dielectric encapsulating material must be of high quality to ensure the integrity of the coating during high temperature treatment. The stress caused by heating due to the mismatch of the thermal expansion coefficients of the semiconductor and encapsulating materials may produce defects in the crystalline structure and enhance the diffusion of conductivity type imparting materials in an uncontrollable manner during the annealing process.
Another approach for preventing surface decomposition is to provide an overpressure of the volatile element, the Group V element, during the annealing treatment. One technique for obtaining an overpressure of the volatile element is by the use of a gaseous source of the element. This procedure, however, requires complicated arrangements in order to ensure that the gas is confined within the annealing chamber.
In another technique a localized overpressure of the volatile element is obtained by placing a wafer of the same III-V compound semiconductor material, or a wafer of another III-V semiconductor material having the same volatile element, in close proximity to the wafer being annealed. Although this procedure is uncomplicated and provides protection for the wafer surface, only a limited temperature range is allowable because of the inability to provide sufficient overpressure of the volatile element at the temperatures which are required to activate the conductivity type imparting materials which are usually employed.